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Draw the logic diagram of a 2-input CMOS NAND & OR gate and explain its working in
brief.
With the help of a neat diagram, explain the working of a ECL OR/NOR gate.
i) With the help of a neat diagram, explain the working of a TTL NAND gate with Totem-
Pole Output and also mention the advantages of this configuration over Open-Collector Output.
ii) With the help of a neat diagram, explain the working of a TTL NAND gate with Open-
Collector output and also mention the disadvantages of this configuration.
Explain flash-type A/D converter using neat circuit diagram and discuss the main
disadvantage of this converter.
Design a synchronous sequential Mealy circuit which produces an output Z=1, whenever the following input sequence ‘0110’ appears .Assume overlapping is allowed and implement using T-FFs.
Design a Synchronous counter that goes through states 0, 5, 3, 2, 6, 0, 5, 3... using J-K Flip-Flops. The counter should count only in 3-bit Gray codes.
Design a MOD-8 Johnson counter and MOD-6 Ring counter, explain its operation.
Design T-FF using a D-FF and 2:1 MUX.
Two instructors announced that they “grade on the curve,” that is, give a fixed percentage of each of
the various letter grades to each of their classes. Their curves are as follows:
If a random student came to you and said that his object was to enroll in the class in which he could
expect the higher grade point average, which instructor would you recommend?
Annual savings due to an energy efficiency project have a most likely value of $30,000. The high
estimate of $40,000 has a probability of 0.2, and the low estimate of $20,000 has a probability of 0.30.
What is the expected value for the annual savings?
