Electrical Engineering Answers

Deaign a bus system that can support 4 registors of 2 bits each . Explain why you created the bus in this method. Also explain how to gather data from this bus back into register

A bus system that facilitates usage of registers near processor and help in executing instructions properly. Give proper diagram and explain with an example such a system.

Each Question carries 10 Marks 

Q1. Design a Shift register which performs:

i) Parallel load function, when input 00 will be applied in S1S0 respectively.

 ii) Shift up function, when input 01 will be applied in S1S0 respectively.

 iii) Shift down function, when input 10 will be applied in S1S0 respectively.

iv) No change function, when input 11 will be applied in S1S0 respectively. 

Q2. An 8 bit register contains the binary value 10011100.What is the register value after an arithmetic shift right? Starting from the initial number 10011100, determine the register value after an arithmetic shift left and state whether there is an overflow or not? 

Q3 Design a 3-bit arithmetic unit which performs seven distinct operations. Also explain its working by taking a suitable example. Draw truth table showing the inputs and corresponding operation of arithmetic unit.

As a designer you have to obtain results using registers of following equation.

R3<-R1+R2.

What would be an appropriate circuit to do so and why?

Design a bus system that can support 4 registers of 2 bits each. Explain why you created the bus in this method. Also explain how to gather data from this bus back into register.

Explain the methodologies of various type that can be used to manipulate bits in register. Elaborate with proper examples.

Design a 6:64 decoder with lower configuration of decoders of your choice, also explain what other possible options can be followed. If the diagram is far big, consider shorthand notations appropriately.

A digital computer has a common bus system for 16 registers of 32 bits each. The bus is constructed with multiplexers. a. How many selection inputs are there in each multiplexer? b. What size of multiplexers are needed? c. How many multiplexers are there in the bus? d. Draw the block diagram for this computer common bus system design.