Each Question carries 10 Marks
Q1. Design a Shift register which performs:
i) Parallel load function, when input 00 will be applied in S1S0 respectively.
ii) Shift up function, when input 01 will be applied in S1S0 respectively.
iii) Shift down function, when input 10 will be applied in S1S0 respectively.
iv) No change function, when input 11 will be applied in S1S0 respectively.
Q2. An 8 bit register contains the binary value 10011100.What is the register value after an arithmetic shift right? Starting from the initial number 10011100, determine the register value after an arithmetic shift left and state whether there is an overflow or not?
Q3 Design a 3-bit arithmetic unit which performs seven distinct operations. Also explain its working by taking a suitable example. Draw truth table showing the inputs and corresponding operation of arithmetic unit.
This would be the best design for the shift register:
The 3-bit would look like this:
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