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A hardware implementation is required for executing the following equations , Draw proper diagrams to complete your results ?
1) x+y+z+a.b : R3 <- R4-R5
2) a.c.b+d : R3 <- R4 + R6
(a) Connect two conductors to the sheath. Measure the capacitance, Cd between the remaining
single conductor and the two other conductors and the sheath. Take the capacitance between
the shorted cores and the sheath as Cb. Now determine the effective capacitance of each
conductor to the grounded neutral.
Q1. Design a Shift register which performs:
i) Parallel load function, when input 00 will be applied in S1S0 respectively.
ii) Shift up function, when input 01 will be applied in S1S0 respectively.
iii) Shift down function, when input 10 will be applied in S1S0 respectively.
iv) No change function, when input 11 will be applied in S1S0 respectively.
Q2. An 8 bit register contains the binary value 10011100.What is the register value after an arithmetic shift right? Starting from the initial number 10011100, determine the register value after an arithmetic shift left and state whether there is an overflow or not?
Q2 Design a 3-bit arithmetic unit which performs seven distinct operations. Also explain its working by taking a suitable example. Draw truth table showing the inputs and corresponding operation of arithmetic unit.
A hardware implementation is required for executing the following equations , Draw proper diagrams to complete your results ?
1) x+y+z+a.b : R3 <- R4-R5
2) a.c.b+d : R3 <- R4 + R6
As a designner you have to obtain results using resistors to follow equation :
R3 <- R1 + R2
What would be an appropriate circuit to do so and why?
Deaign a bus system that can support 4 registors of 2 bits each . Explain why you created the bus in this method. Also explain how to gather data from this bus back into register
A bus system that facilitates usage of registers near processor and help in executing instructions properly. Give proper diagram and explain with an example such a system.
Each Question carries 10 Marks
Q1. Design a Shift register which performs:
i) Parallel load function, when input 00 will be applied in S1S0 respectively.
ii) Shift up function, when input 01 will be applied in S1S0 respectively.
iii) Shift down function, when input 10 will be applied in S1S0 respectively.
iv) No change function, when input 11 will be applied in S1S0 respectively.
Q2. An 8 bit register contains the binary value 10011100.What is the register value after an arithmetic shift right? Starting from the initial number 10011100, determine the register value after an arithmetic shift left and state whether there is an overflow or not?
Q3 Design a 3-bit arithmetic unit which performs seven distinct operations. Also explain its working by taking a suitable example. Draw truth table showing the inputs and corresponding operation of arithmetic unit.
As a designer you have to obtain results using registers of following equation.
R3<-R1+R2.
What would be an appropriate circuit to do so and why?
#339914 on Dec 2023