Answer to Question #242161 in Electrical Engineering for Aslka

Question

A hardware implementation is required for executing the following equations , Draw proper diagrams to complete your results ?

1) x+y+z+a.b : R3 <- R4-R5

2) a.c.b+d : R3 <- R4 + R6

Answer 1

We are provided:

 Provided that:

x+y+z+a.b : R3 <- R4-R5

   a.c.b+d : R3 <- R4+R6

It is evident that the type of design requires a critical understanding of organization. Instructions are stored in one section of memory and data in another. For a memory unit with 4096 words we need 12 bits to specify an address since 212 = 4096. If we store each instruction code in one 16-bit memory word, we have available four bits for the operation code (abbreviated op code) to specify one out of 16 possible operations, and 12 bits to specify the address of an operand. The control reads a 16-bit instruction from the program portion of memory. It uses the 12-bit address part of the instruction to read a 16-bit operand from the data portion of memory. It then executes the operation specified by the operation code: