Answer to Question #262468 in Assembler for Talltim

Question #262468

Consider that an instruction pipeline has only three stages namely instruction fetch and

decode (IFD), Operand Fetch (OF), and Instruction execute and store results (IES). Draw and

instruction pipeline diagram showing execution of 5 sequential instructions. What are the

problems of this instruction pipelining?


1
Expert's answer
2021-11-09T10:21:12-0500

When pipelining is implemented, situations arise that prevent the execution of the next instruction from the instruction stream in the cycle intended for it. These situations are called conflicts. Conflicts reduce the actual performance of the conveyor. There are three classes of conflicts:

Structural conflicts that arise from resource conflicts where the hardware cannot support all possible combinations of instructions in a concurrent, overlapping mode.

Data conflicts that arise when the execution of one command depends on the result of the previous command.

Control conflict that arise during pipelining of branch instructions and other instructions that change the value of the instruction counter.

Conflicts in the pipeline lead to the need to suspend the execution of commands (pipeline stall). Usually in the simplest pipelines, if a command is suspended, then all commands following it are also suspended. Commands preceding the suspended command can continue to execute, but no new commands are selected during the suspended state.


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