Answer to Question #106370 in Programming & Computer Science for DeadBeast

Question

In a paged memory system where the entire process is loaded in memory
(not demand paging), you have a 35-entry TLB. Assume that the probabibility
of a memory access being in any one page is the same (unlike normal). If
the TLB search time is 5nsec and memory access time is 50nsec, how large
is the process in pages if the effective access time is 70nsec? Show work.

Answer 1

A paged memory system uses virtual memory in the process. To make access to memory, the virtual address must be translated into physical.

This translation is stored in the same physical memory using some version of the “page table”.

A translation translation buffer (TLB) is a memory cache that is used to reduce the time required to access a user's memory location.

If we have a TLB with 35 entries and access to no more than 35 pages, all the virtual addresses used by the program will fall into the TLB, and only the TLB delay will be added to the memory access time

And if the program provides uniform access to memory and uses more pages (has a larger page size) than it can be stored in the TLB, with some accesses you will need to "crawl the page table" to fill up some TLB record. If 1/5 of the program memory accesses misses TLB (and 4/5 does not), then the effective access time will be:

t = (1-1 / 5) * a + 1/5 * b

where a is the execution time of a successful search in the TLB and 1 access to the main memory, and b is the execution time of the unsuccessful search for the TLB, the table of access pages (by reading the main memory), (it is possible to replenish the TLB and search again if you do not use MMU to optimize), and then make access to the memory required by the application.