With aid of a diagram, give a brief explanation on the type of busses available on modern computer system and the purpose of the North bridge and south bridge
Processor bus. This high-speed bus is the core of the chipset and motherboard. It is used primarily by the processor to transfer data between the cache or main memory and the northbridge of the chipset. On Pentium processor-based systems, this bus runs at 66, 100, 133, 200, 266, 400, 533, 800, or 1066 MHz and is 64 bits (8 bytes) wide.
AGP bus. This 32-bit bus operates at 66 (AGP 1x), 133 (AGP 2x), 266 (AGP 4x) or 533 MHz (AGP 8x), provides a throughput of up to 2133 MB / s and is intended for connecting a video adapter. It is connected to the northbridge or memory controller (MCH) of the system logic chipset.
PCI-Express bus. The third generation of the PCI bus. The PCI-Expres bus is a differential signal bus that the northbridge or southbridge can carry. The performance of PCI-Express is expressed in terms of the number of lanes. Each bidirectional link provides 2.5 or 5 Gb/s data transfer rates in both directions (250 or 500 MB/s effective). A single lane connector is referred to as PCI-Express x1. PCI-Express video adapters are typically installed in an x16 slot, which provides a data transfer rate of 4 or 8 GB/s in each direction.
PCI bus. This is the second generation of the PCI bus, which provides higher data transfer rates while being backwards compatible with PCI. This bus is mainly used in workstations and servers. PCI-X supports 64-bit slots that are backwards compatible with 64-bit and 32-bit PCI adapters. The PCI-X version 1 bus runs at 133 MHz, while PCI-X 2.0 supports up to 533 MHz. Typically, PCI-X 2.0 bandwidth is split between multiple PCI-X and PCI slots. While some southbridges support the PCI-X bus, most often a dedicated chip is required to support it.
PCI bus. This 32-bit bus runs at 33 MHz; it has been in use since 486-based systems. There is currently a 66 MHz implementation of this bus. It is under the control of the PCI controller - a component of the north bridge or the MCH controller of the system logic chipset.
The PCI-X and PCI-Express buses are higher performance implementations of the PCI bus; motherboards and systems supporting this bus appeared on the market in mid-2004.
Assignment of the north and south bridge
The Northbridge (eng. Northbridge; in some Intel chipsets, also - the controller-hub of the memory eng. Memory Controller Hub, MCH [1]) - the system controller [2] [3] of the chipset on the motherboard of the x86 platform, to which within the organization interactions connected:
* via Front Side Bus - microprocessor,
* if the processor does not have a memory controller, then through the memory controller bus - RAM,
* via the graphics controller bus - video adapter (in low-end motherboards)
new range, the video adapter is often built-in). In this case, the northbridge manufactured by Intel is called GMCH (from the English Chipset Graphics and Memory Controller Hub)[1]).
The name can be explained by the representation of the chipset architecture in the form of a map. As a result, the processor will be located at the top of the map, in the north.
Based on the destination, the north bridge determines the parameters (possible type, frequency, bandwidth):
* system bus and, indirectly, the processor (based on this - to what extent the computer can be overclocked),
* RAM (type - for example SDRAM, DDR, its maximum amount),
* connected video adapter.
In many cases, it is the parameters and speed of the north bridge that determines the choice of expansion buses (PCI, PCI Express) implemented on the motherboard of the system.
In turn, the northbridge is connected to the rest of the motherboard through a matching interface and the southbridge.
Southbridge (from the English Southbridge) (functional controller), also known as the I / O Controller Hub (ICH).
This is usually a single chip that links "slow" (compared to CPU-RAM) interactions (for example, Low Pin Count, Super I / O, or bus connectors for connecting peripherals) on the motherboard to the CPU through the Northbridge , which, unlike the South, is usually connected directly to the central processor.
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