A 4-stage pipeline has the stage delays as 150, 120, 160 and 140
nanoseconds respectively. Registers that are used between the stages have a
delay of 5 nanoseconds each.
Question: Assuming constant clock rate, calculate the total time taken to
process 1000 data items on this pipeline.
Delay between each stage is 5 ns.
Total delay for 1st data item = 165"\\times"4
= 660
For 1000 data items, first data will take 660 ns to complete and rest
999 data will take max of all the stages that is 160 ns + 5 ns register delay
Total Delay = 660 + 999"\\times"165 ns
=165.5 microsecond.
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