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The purpose of the address decoder that is incorporated as part of a memory device is to _______. (Select the best answer.)

Question options:


a. identify selected memory location using the address received from the processor


b. "activate" the memory device so that it connects to the bus


c. to decode the instructions for the processor to execute


d. to determine if the memory device contains data


Write assembly language code that uses a stack frame to implement the following high-level language function and its call. Do not optimize stack access in the function, (i.e.,
write all intermediate results to variables on the stack frame as indicated in the high-level language code).

/* Global variables */
word MemoryWord,
Result;
/* Function */
word IncMemWord (word *Pointer) {
word MemWord;
MemWord = *Pointer;
MemWord = MemWord + 1;
*Pointer = MemWord;
return MemWord;
}
/* Call */
Result = IncMemWord (&MemoryWord);
Explain what the Cortex-M0+ “interrupt priority levels” are and how they are used.
Explain what happens from the time of an interrupt request, (i.e., IRQ line is asserted),
through the start of executing an interrupt service routine, and then how control returns
to the interrupted program. Assume that the interrupt request does not occur at the
same time as any other interrupt request. (Note: ere are many steps involved, so
take your time and be specific.)
Describe the details of initializing the PIT (timer) to generate interrupt requests, as used
in lab. Be sure to describe all control register bits that must be set and/or cleared to
enable interrupts and why each bit/field must have the value that you indicate. (Omit
details of any PIT initialization not specifically associated with enabling the interrupts
used in lab.)
Write an assembly language macro (called TOTAL) according to these specifications.
a. Accepts a pointer to an array of signed words in any arbitrary low register, (i.e., specified
as a parameter).
b. Accepts an unsigned word value that indicates the number of array elements in another
arbitrary low register, (i.e., specified as a parameter).
c. Returns the sum, (i.e., total), of array elements in an arbitrary low register, (i.e., specified
as a parameter).
d. Except for the obvious need to modify the register used to return the result, leaves all
registers (other than the program status register) unchanged after the execution of the
expanded macro is complete.
Are the same assembly instructions used both to end a subroutine and to end an interrupt
service routine (ISR)? If so, do they have a different effect when returning from a subroutine
than when returning from an ISR, and how can the effect be different if the instructions are
the same? If not, explain what instruction would return from a subroutine and what
instruction would return from an ISR.
Explain how a subroutine, an interrupt service routine, and an exception handler differ with
regard to these aspects.
a. Invoking source, (i.e., what “causes” execution)
b. Conditions when invoked, (i.e., where and when execution occurs in CPU operation)
c. CPU actions after invoked but before execution
d. Return from execution
Describe the details of initializing UART0 to generate interrupt requests, as used in lab. Be
sure to describe all control register bits that must be set and/or cleared to enable interrupts
and why each bit/field must have the value that you indicate. (Omit details of any UART0
initialization not specifically associated with enabling the interrupts used in lab.)

Design a two bit down counter circuit that counts from 3 to 0. It should have states 11, 10, 01, and 00. The initial state of the counter may be assumed to be 11. The counter will be in following successive states: 11, 10, 01, 00, 11, 10, 01, 00, 11,... Use J-K flip flop to design the circuit. You must design the circuit using state transition diagram and Karnaugh's maps.



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