Search & Filtering
Write an assembly program for multiplication of two eight bit no. at 4000H=1BH and 4001H=3AH and save result at 4002H and 4003H.
Write an assembly program for multiplication of two eight bit no. at 4000H=1BH and
4001H=3AH and save result at 4002H and 4003H.
Write an assembly program for multiplication of two eight bit no. at 4000H=1BH and
4001H=3AH and save result at 4002H and 4003H
Suppose, DS= 1000 H, BX= 1200 H, DI= 20 H, Oxyzen= 20H. Then, calculate the physical address of the source for the following instruction in real mode:
MOV DX, Oxyzen[BX+ DI].
Explain when we can use the Greedy algorithms.
How can you solve “all-pairs shortest path” problems using:
i. Dijkstra’s algorithm and
ii. Bellman-Ford algorithm
What are the major differences between a microprocessor and a microcontroller?
(b) What are the major differences between a microprocessor and a microcontroller?
Considering Dot matrix display write an assembly language code such that, first when user presses numeric key 1 on the keyboard; at output first character of your middle name should display in a loop for “X “times and when user presses numeric key 2 on the keyboard; at output second character of your middle name should display in a loop for “Y “times. Repeat the sequence continuously.
HERE: “X” is the last digit of your Iqra University ID No.
“Y” is the second last digit of your Iqra University ID No.
* (If the number is 0 use 9 instead of it)
a) Suppose a computer having 5 GHz processor with cycle time of 2ns and main memory access time
100ns with CPI is 2 cycle.
i. Calculate the processor performance without cache.
ii. Calculate the performance with L1 cache, assume L1 hit rate is 75% and access time is 1ns.
iii. Calculate the performance with L2 cache, assume L2 hit rate is 90% and access time is 5ns.
iv. Calculate the performance with L3 cache, assume L3 hit rate is 95% and access time is 7ns.
c) It is desired to have memory of 64Kbytes given that a 13 bit address bus is used to address
memory location. Design the decoding architecture in order to access complete 64Kbytes
memory also calculates address ranges for each memory chip.
