Answer to Question #131851 in Assembler for Suchi

Question

Explain the following in the context of 8086 Microprocessor :
(i) Physical address calculation using CS:IP and SS:SP pairs
(ii) Processing of software Interrupts in 8086 microprocessor
(iii)Indirect Addressing modes of 8086 microprocessor

Answer 1

(i) Physical address calculation using CS:IP and SS:SP pairs

The value of the code segment register (CS)

The value of the Instruction Pointer, holding address of the instruction

Physical address of the instruction:        Physical_Address = CS + IP

The value of the stack segment register (SS)

The value of the stack pointer (SP)

Physical address of the top of the stack is: SS + SP

(ii) Processing of software Interrupts in 8086 microprocessor

An interrupt is a condition in which the microprocessor stops temporarily to work on another task and then returns to its previous task.

When the 8086 responds to an interrupt, it automatically jumps to the specified location in the 8086 interrupt vector table to obtain the starting address of the interrupt service routine. Software interrupts are instructions that are inserted into the program to generate interrupts. The 8086 has 256 types of software interrupts

The instructions are in the format INT, where the type ranges from 00 to FF.

The starting address ranges from 00000H to 003FFH. These are 2 byte instructions. IP is loaded from type * 04H and CS is loaded from the next address give by (type * 04) + 02H

(iii)Indirect Addressing modes of 8086 microprocessor

The 80x86 CPUs let you access memory indirectly through a register using the register indirect addressing modes.

 

The Register Indirect Addressing Modes:

This addressing mode allows data to be addressed at any memory location through an offset address held in any of the following registers: BP, BX, DI and SI:

mov  al, cs:[bx]
mov  al, ds:[bp]
mov  al, ss:[si]
mov  al, es:[di]

 

Based addressing mode

In this addressing mode, the offset address of the operand is given by the sum of contents of the BX/BP registers and 8-bit/16-bit displacement.

MOV DX, [BX+04]

Indexed addressing mode

In this addressing mode, the operands offset address is found by adding the contents of SI or DI register and 8-bit/16-bit displacements.

MOV BX, [SI+16]
ADD AL, [DI+16] 

Based-index addressing mode

In this addressing mode, the offset address of the operand is computed by summing the base register to the contents of an Index register.

ADD CX, [AX+SI]
MOV AX, [AX+DI] 

 Based indexed with displacement mode

In this addressing mode, the operands offset is computed by adding the base register contents. An Index registers contents and 8 or 16-bit displacement.

MOV AX, [BX+DI+08]
MOV CX, [BX+SI+16]