Other Engineering Answers

Describe how one can adjust the address lines,data line if 4096 bytes of RAM is required by a system.The lowest chip size is 256* 8 give complete diagram

What is the possible bus construction strategy

when you wish to connect data, address and control

buses for I/O systems and Memory? Elaborate one of

the mappings with diagram.

on extra address space is allocated by the operating system to

easily run applications. Blaborate on this with proper method and strategy

of page swagging.

what principles are preffered to bring data into cache so that low amount of miss ratio is observed

What is possible bus construction strategy when you wish to connect data,address and control buses for I/O system and memory? Elaborate one of the mappings with diagram.

A data block is brought to cache memory on request by CPU, what different methods of keeping the data and associated address information can be used in this scenario.

What memory would you use for storage in case you are not concerned with speed.Explain what you understand by access time,seek time and total time taken.

What is the method for sending data towards destination that is not following the same clock cycle?

Give rules for this communication.

Illustrate how the following UMLs are use in software engineering and indicating 2 strengths and 2 weaknesses of each diagram

a. Class diagram

b. Activity diagram

c. Case diagram

d. State diagram