Electrical Engineering Answers

Calculate and plot the percent bandwidth for a 𝑁𝑁=1-section binomial matching transformer versus 𝑍𝑍𝐿𝐿𝑍𝑍0􀵗=1.5 to 6 for 𝛤𝛤𝑚𝑚=0.2. (Show all calculated values and plot labels)

The output of four registers R0, R1, R2, and R3 are connected through 4-to-1 line multiplexers to the

input of a fifth register, R5. Each register is eight bit long. The required transfer is dictated by four

timing variables T0 through T3 as follows:

T0 : R5 R0

T1 : R5 R1

T2 : R5 R2

T3 :R5 R3

Draw the block diagram showing the hardware implementation of the register transfer. Including the

connection necessary from the four timing variable to the selection inputs of the multiplexers and to

the load input of register R5.

Determine average voltage over the load of a single-phase half-wave rectifier

fed from a 220 V 50 Hz supply. The load consists of a 100 mH inductor with a 10 Ω

internal resistance. [25]

A cable one mile long and 0.50 inch in diameter is composed of a steel core 0.25 inch in diameter and the outside shell is aluminum. The resistance of the cable is _____ is Ps and Pa 57.4 and 17.5 ohm Cmil/ft, respectively

a. 0.447 ohm c. 0.625 ohm b. 0.893 ohm d. 5.3 ohms

Write on ANY TWO practical applications of feedback concepts to real-life

problems. The practical applications can be in any area, e.g. electronics,

control systems, mechanical systems, automobile systems, banking and

finance, business, economics, biological systems, medical sciences, industry,

etc.

Your answer should include a statement of the problem and how feedback

concepts are used for solving it. The answer should be supported with relevant annotated diagrams, and any useful basic equations. Elaborate

equations are not required.

Simplify the following functions.

(a) (x + y)(x + y’)

(b) xy’+ y

The above diagram is that of an RC Low Pass filter. Determine the Transfer Function H= (Vout(jꙌ))/(Vin(jꙌ)) If R1 is 10kHz design a low pass filter with a dc gain of 20dB and a 3dB cut-off frequency of 1kHz. What is the gain output of the filter when the input frequency is a) 2kHz and b) 20kHz. Hence using these two values determine the filter roll-off in dB per decade.

1. Design an SR Flip Flop using NOR gates and explain each input cases.

2 .Design of a Synchronous 8 bit Counter using JK Flip Flop by explaining each step

3 .Design circuit of BCD to seven segment display and explain the truth table with

the display output.

4. Design circuit of full adder

Note: Simulator output must be shown for each question

Design of a Synchronous 8 bit Counter using JK Flip Flop by explaining each step