Answer to Question #200054 in Electric Circuits for rama

Question

Implement the following multiple output combinational logic circuit using a 4 line to 16-line decoder: F1= ∑m (0, 1, 4, 7, 12, 14, 15) F3= ∑m (2, 3, 7, 8, 10) F2= ∑m (1, 3, 6, 9, 12) F4= ∑m (1, 3, 5)

Answer 1

F1= ∑m (0, 1, 4, 7, 12, 14, 15)

F2= ∑m (1, 3, 6, 9, 12)

F3= ∑m (2, 3, 7, 8, 10)

F4= ∑m (1, 3, 5)