In April 2025
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With the help of a neat diagram, explain the working of a ECL OR/NOR gate.
i) With the help of a neat diagram, explain the working of a TTL NAND gate with Totem-
Pole Output and also mention the advantages of this configuration over Open-Collector Output.
ii) With the help of a neat diagram, explain the working of a TTL NAND gate with Open-
Collector output and also mention the disadvantages of this configuration.
Explain flash-type A/D converter using neat circuit diagram and discuss the main
disadvantage of this converter.
Design a synchronous sequential Mealy circuit which produces an output Z=1, whenever the following input sequence ‘0110’ appears .Assume overlapping is allowed and implement using T-FFs.
Design a Synchronous counter that goes through states 0, 5, 3, 2, 6, 0, 5, 3... using J-K Flip-Flops. The counter should count only in 3-bit Gray codes.
Design a MOD-8 Johnson counter and MOD-6 Ring counter, explain its operation.
Design T-FF using a D-FF and 2:1 MUX.
Q3. “There is a mechanism in which CPU relinquishes the control over the buses for carrying out various operations between memory unit and I/O unit.”Justify your answer and explain such process in detail with the help of suitable diagram.
Write a program which prints the name and lawyer of each client whose age is L or higher.
(L is age variable)
A 234 volts three-phase source serves a balanced load consisting of three equal impedances, each of which has a resistance of 3.6 ohms and reactance of 4.8 ohms Calculate the line currents and the total power if the impedances are connected in delta.
