Electrical Engineering Answers

Assume a 4-bit shift register using D flip flop which will take one clock cycle for loading the data and 3 clock cycles for getting the output, Identify the type of shift register and describe its operation with a diagram

Design a mealy machine whose output is 1 only when input 1101 is detected otherwise output is 0 with overlapping allowed and not allowed conditions.

Design a synchronous counter by using T-flip-flop which can counter the sequence 0, 1,2,4,5,0….and rest states move to 0.

Design a Mod -5 asynchronous up counter using +ve edge triggering D flip flop

Differentiate between Ring Counter, Johnson Counter, Synchronous, and Asynchronous

Counter.

In conducting medium: H= y^2zax+2(x+1)yzay-(x+1)z^2az

(A/M).

find the current density J at (2,0,-1)

In conducting medium: H= y^2zax+2(x+1)yzay-(x+1)z^2az

(A/M).find the current density J at (2,0,-1)

‘A decoder with an enable input can be used as a DEMUX’. Justify and design a 3:8

decoder using 2:4 decoder so that it can also be used as a 1:8 DEMUX.

Design a 3-bit Even Parity Generator circuit using a Decoder with Active-Low outputs.

Design a 4:2 Priority Encoder such that the order of priority of the decimal inputs is given

as D2> D0> D1> D3, where all Di’s are inputs to the priority encoder.