Electrical Engineering Answers

Consider an electric field E = a_R 5 R² + a_θ 12 Sin ϕ. Verify the respective null identity.

. Repeat the procedure learned in lab to demonstrate a code using MATLAB which compute & Express graphically the following for a graph given below

a)     x(t)

b)     x(t+1)

c)     x(t-1)

d)     x(1.5t)

e)     x(1.5t+1)

Consider you are a research engineer who is assigned to cut the hardware cost of the circuits by reducing the gate count. For this you have to find multiple options through which you can do it. A junior engineer designed a circuit for solving a problem whose end statement is

You have the following options:

1. Use multiple AND gates and one multi input OR gate

2. Use multiple OR gates with one multi input AND gate.

Implement both of these scenarios and discuss with reasons which one would be lesser in

During your current job your boss has asked you to re-implement the circuit that someone designed and implemented two years back on hardware.

1. 

2. 

The following are requirements: 

1. The number of gates in the circuit should be minimum possible. 

2. Only one type of gate can be used.

Implement the above circuit by choosing the optimum gate and state reasons for your choice.

Z1 and Z2 are first connected in series then in parallel Express the combined impendances in each casein form of x +jy ; if Z1 = 4-j3 and Z2= 5+j2

-2xydy+(x²+y²)dx=0

Solve by integrating factor

An industrial sensor used to measure temperature, the Rosemount 214C from Emerson, has a nominal resistance of 100 ohms at 0 𝑜C, with a temperature coefficient of resistance (alpha) equal to 3.85*10 -3 / oC. It is used to measure temperatures ranging from – 45 oC to 455 oC. An alarm is to be raised when the temperature rises above 400 oC – a red LED, with a cut-in voltage of 1.8 V is to light up to indicate this status. If the maximum current through the LED is to be 10 mA, while that through the RTD is limited to 100 A, design an appropriate circuit for this purpose, so that the output voltage will not be greater than 5 V. You are provided with + 15 V supplies and may assume that all components are ideal. 

1. (i) Using npn BJTs, with a dc current gain of 200 and an Early Voltage of 100 V, design a current source of magnitude 2 mA. Determine the voltage compliance of your current source.

(ii) Use this current source to establish a common emitter amplifier, employing an active load, using pnp transistors, with VA = 50 V. If you are provided with power supplies of + 5 V, determine the gain of your amplifier. Determine the maximum input voltage than can be applied to this amplifier.

 With the help of an appropriate circuit diagram, describe the wiring of a DC series motors and DC shunt motors.

On Xilinx, design a logic circuit to implement the four functions, F1 – F4 described below, simultaneously using one `157 IC. Construct your entire schematic diagram and label all necessary pins and simulate for results.

F1 = a’b, F2 = a + b’, F3 = a xnor b, F4 = b’

please just do an explanation of how you did it from the beginning to end, basically an explanation on how you did it on xilinx.

What is ramp function