Answer to Question #331445 in Electrical Engineering for mansi

Question

The output of four registers R0, R1, R2, and R3 are connected through 4-to-1 line multiplexers to the

input of a fifth register, R5. Each register is eight bit long. The required transfer is dictated by four

timing variables T0 through T3 as follows:

T0 : R5 R0

T1 : R5 R1

T2 : R5 R2

T3 :R5 R3

Draw the block diagram showing the hardware implementation of the register transfer. Including the

connection necessary from the four timing variable to the selection inputs of the multiplexers and to

the load input of register R5.