Write a Verilog code for Mealy FSM to detect 0101 sequence with overlapping in behavioral
modeling.
In the given question, it can be seen that output goes high only when input sequece is 0101. Hence, it is detecting the sequence 0101 in overlapping manner.
So we have to construct the mealy FSM circuit for the sequence detector :- 0101
Since to represent the 4 number of sequences, 4number of states are required.
Refer the attached diagram.
Hence, the States are as follows,
a=00, b=01, c=10, d=11
State table :-
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